RTD-CMOS pipelined networks for reduced power consumption
The incorporation of resonant tunneling diodes (RTDs) into III/V transistor technologies has shown an improved circuit performance, producing higher circuit speed, reduced component count, and/or lower power consumption. Currently, the incorporation of these devices into CMOS technologies (RTD-CMOS)...
| Authors: | , , |
|---|---|
| Format: | article |
| Status: | Versión aceptada para publicación |
| Publication Date: | 2011 |
| Country: | España |
| Institution: | Universidad de Sevilla (US) |
| Repository: | idUS. Depósito de Investigación de la Universidad de Sevilla |
| OAI Identifier: | oai:idus.us.es:11441/76623 |
| Online Access: | https://hdl.handle.net/11441/76623 https://doi.org/10.1109/TNANO.2011.2157518 |
| Access Level: | Open access |
| Keyword: | Resonant tunneling diode Nano-pipeline Emerging technologies Logic circuits Power efficiency |
| Summary: | The incorporation of resonant tunneling diodes (RTDs) into III/V transistor technologies has shown an improved circuit performance, producing higher circuit speed, reduced component count, and/or lower power consumption. Currently, the incorporation of these devices into CMOS technologies (RTD-CMOS) is an area of active research. Although some studies have concentrated on evaluating the advantages of this incorporation, more work in this direction is required. In this letter, we compare RTD-CMOS and pure CMOS realizations of a logic gate network which can be operated in a gate-level pipeline. Significantly lower average power is obtained for RTD-CMOS implementations. |
|---|