Contention-aware scheduling and resource management for emerging multicore architectures
Chip multicore processors (CMPs) currently constitute the architecture of choice for mosto general-pùrpose computing systems, and they will likely continue to be dominant in the near future. Advances in technology have enabled to pack an increasing number of cores and bigger caches on the same chip....
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| Formato: | tesis doctoral |
| Fecha de publicación: | 2022 |
| País: | España |
| Recursos: | Universidad Complutense de Madrid (UCM) |
| Repositorio: | Docta Complutense |
| Idioma: | inglés |
| OAI Identifier: | oai:docta.ucm.es:20.500.14352/3552 |
| Acesso em linha: | https://hdl.handle.net/20.500.14352/3552 |
| Access Level: | acceso abierto |
| Palavra-chave: | 004.4.032.24 004.272 004.421 Parallel processing (Electronic computer) multiproccess computer Algorithms computer Software-development Procesos paralelos multiprocesadores algoritmos computacionales Software-desarrollo Software 3304.16 Diseño Lógico |
| Resumo: | Chip multicore processors (CMPs) currently constitute the architecture of choice for mosto general-pùrpose computing systems, and they will likely continue to be dominant in the near future. Advances in technology have enabled to pack an increasing number of cores and bigger caches on the same chip. Nevertheless, contention on shared resources on CMPs -present since the advent of these architectures- still poses a big challenge. Cores in a CMP typically share a last-level cache (LLC) and other memory-related resources with the remaining cores, such as a DRAM controller and an interconnection network. This causes that co-running applications may intensively compete with each other for these shared resources, leading to substantial and uneven performance degradation... |
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