On-chip sinusoidal signal generation with harmonic cancelation for analog and mixed-signal BIST applications
This work presents a technique for the on- chip generation of analog sinusoidal signals with high spectral quality and reduced circuitry resources. The proposed generation technique consists of a modi ed low-order analog lter, that provides a sinusoidal out- put as response to a DC input, combined w...
| Authors: | , , , |
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| Format: | article |
| Status: | Versión aceptada para publicación |
| Publication Date: | 2015 |
| Country: | España |
| Institution: | Universidad de Sevilla (US) |
| Repository: | idUS. Depósito de Investigación de la Universidad de Sevilla |
| OAI Identifier: | oai:idus.us.es:11441/64493 |
| Online Access: | http://hdl.handle.net/11441/64493 https://doi.org/10.1007/s10470-014-0456-0 |
| Access Level: | Open access |
| Keyword: | On-chip signal generators On-chip sine-wave generators Harmonic cancellation Analog BIST Mixed-signal BIST |
| Summary: | This work presents a technique for the on- chip generation of analog sinusoidal signals with high spectral quality and reduced circuitry resources. The proposed generation technique consists of a modi ed low-order analog lter, that provides a sinusoidal out- put as response to a DC input, combined with a har- monic cancellation strategy to improve the linearity of the generated signal. The proposed generator has the attributes of digital programming and control, low area overhead, and low design e ort, which make this ap- proach very suitable as test stimulus generator for built- in test applications. An integrated prototype designed in a 180nm CMOS technology is presented in order to show the feasibility of the technique. Results obtained from the prototype show a THD around 80dB. |
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