Explaining dynamic cache partitioning speed ups
Cache partitioning has been proposed as an interesting alternative to traditional eviction policies of shared cache levels in modern CMP architectures: throughput is improved at the expense of a reasonable cost. However, these new policies present different behaviors depending on the applications th...
| Autores: | , , , |
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| Formato: | artículo |
| Fecha de publicación: | 2007 |
| País: | España |
| Recursos: | Universitat Politècnica de Catalunya (UPC) |
| Repositorio: | UPCommons. Portal del coneixement obert de la UPC |
| Idioma: | inglés |
| OAI Identifier: | oai:upcommons.upc.edu:2117/102823 |
| Acesso em linha: | https://hdl.handle.net/2117/102823 https://dx.doi.org/10.1109/L-CA.2007.3 |
| Access Level: | acceso abierto |
| Palavra-chave: | Microprocessors Cache memory Microprocessor chips Cache storage Microprocessadors Memòria cau Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
| Resumo: | Cache partitioning has been proposed as an interesting alternative to traditional eviction policies of shared cache levels in modern CMP architectures: throughput is improved at the expense of a reasonable cost. However, these new policies present different behaviors depending on the applications that are running in the architecture. In this paper, we introduce some metrics that characterize applications and allow us to give a clear and simple model to explain final throughput speed ups. |
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