Two-Capacitor Direct Interface Circuit for Resistive Sensor Measurements
Direct interface circuits (DICs) avoid the need for signal conditioning circuits and analog-to-digital converters (ADCs) to obtain digital measurements of resistive sensors using only a few passive elements. However, such simple hardware can lead to quantization errors when measuring small resistanc...
| Autores: | , , , |
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| Tipo de recurso: | artículo |
| Fecha de publicación: | 2021 |
| País: | España |
| Institución: | Instituto de Salud Carlos III (ISCIII) |
| Repositorio: | Repisalud |
| Idioma: | inglés |
| OAI Identifier: | oai:repisalud.isciii.es:20.500.12105/18266 |
| Acceso en línea: | http://hdl.handle.net/20.500.12105/18266 |
| Access Level: | acceso abierto |
| Palabra clave: | Direct interface circuits Interface sensor Resistive sensor Time-based measurement Calibration methods Uncertainty Incertidumbre Redes neurales de la computación Computadoras de mano Patient Discharge Humans Neural Networks (Computer) Algorithms Computers, Handheld Analog-Digital Conversion Computers Calibration |
| Sumario: | Direct interface circuits (DICs) avoid the need for signal conditioning circuits and analog-to-digital converters (ADCs) to obtain digital measurements of resistive sensors using only a few passive elements. However, such simple hardware can lead to quantization errors when measuring small resistance values as well as high measurement times and uncertainties for high resistances. Different solutions to some of these problems have been presented in the literature over recent years, although the increased uncertainty in measurements at higher resistance values is a problem that has remained unaddressed. This article presents an economical hardware solution that only requires an extra capacitor to reduce this problem. The circuit is implemented with a field-programmable gate array (FPGA) as a programmable digital device. The new proposal significantly reduces the uncertainty in the time measurements. As a result, the high resistance errors decreased by up to 90%. The circuit requires three capacitor discharge cycles, as is needed in a classic DIC. Therefore, the time to estimate resistance increases slightly, between 2.7% and 4.6%. |
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